Indian semiconductor ecosystem: News, Updates & Discussions.

Tata Electronics to test and assemble automotive chips with Japan's ROHM

ET Online
Last Updated: Dec 22, 2025, 12:39:00 PM IST
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Synopsis
Tata Electronics has partnered with Japan's ROHM Co. to manufacture semiconductors for both Indian and global markets. This collaboration will establish a power semiconductor manufacturing framework in India, combining ROHM's technology with Tata's assembly and testing capabilities. The companies aim for mass production of automotive-grade Si MOSFETs by 2026, expanding business opportunities and strengthening India-Japan semiconductor ties.


Tata Electronics on Monday entered into a strategic partnership with Japan's semiconductor and electronics manufacturer ROHM Co. to assemble and test ROHM’s India-designed automotive-grade Nch 100V, 300A Si MOSFET in a TOLL package, targeting mass production shipments by 2026.

Under the pact, the two companies will manufacture semiconductors for both the Indian and global markets. They will establish a manufacturing framework for power semiconductors in India by combining ROHM’s leading device technologies with Tata Electronics’ semiconductor assembly and test capabilities.

"This partnership aims to leverage the expertise and ecosystem of both the companies in order to expand business opportunities for both ROHM and Tata Electronics, thereby further strengthening the relationship between the semiconductor industries of Japan and India," the Tata Group company said.

Through its semiconductor assembly and test facilities, Tata Electronics will deliver chip packaging services to support ROHM in creating products tailored for Indian and global markets. The companies will further explore the co-development of high-value packaging technologies in the future.

Speaking on the agreement, Dr Kazuhide Ino, Member of the Board, Managing Executive Officer, ROHM Co., Ltd., said, "Through this partnership, we aim to expand our lineup of packaged products manufactured in India and help build a sustainable, region-based supply chain network."

The Japanese company is confident that this collaboration will enable them to meet the growing demand from Indian customers seeking domestically produced semiconductors.

"This partnership will go a long way in bringing in trust and resilience in the global semiconductor supply chain while also expanding our respective business opportunities," Dr Randhir Thakur, CEO & MD, Tata Electronics, said.

The two companies aim to create new business opportunities in the Indian market and deliver higher-value solutions to a wide range of customers by leveraging the duo's sales channels and networks. The manufactured products will be marketed in collaboration.

The Tata-ROHM partnership enhances Domestic Value Addition (DVA) and enables stable supply of products optimized specifically for the Indian market.

Tata's Fab plans

Tata Electronics is building India's first commercial Fab in Dholera, Gujarat in partnership with PSMC, Taiwan, with a total investment of $11 billion. The planned Fab is expected to have a total monthly capacity of 50,000 wafers for Analog and Logic IC chips based on 28nm to 110nm technologies.

The company is also building India’s first indigenous Outsourced Semiconductor Assembly and Test (OSAT) facility in Jagiroad, Assam, with an investment of $3 billion. It already runs an OSAT facility at Vemgal, Karnataka.

The two facilities aim to serve customers across sectors like automotive, mobile devices, Internet of Things (IoT), artificial intelligence, defense, aerospace and other key domains.

The company has signed numerous pacts with Indian and international players to boost its semiconductor plans. Some of the key collaborations include those with Intel, Merck Electronics, Bosch, Bharat Electronics and more.

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"The Tata Group is deeply committed to developing a robust semiconductor industry in India," N Chandrasekaran, Chairman at Tata Sons, said earlier.

Tata Electronics to test and assemble automotive chips with Japan's ROHM
 
Pretty much everything that uses RF signals in one way or another. From radios, to EW, to radars, to ESMs, to seekers, to sensors etc. The list is long.

A broad overview of where we are in defence semi-conductors:

1. Wafer size: Larger diameter wafer means more semi-conductors etched per wafer. Thus, a higher production rate. The largest wafer size that our domestic defence fabs can handle is 150mm. That is the STARC fab for producing Si-based MEMS & RF sensors. This new development by SSPL is for 4-inch diameter (~110.6 mm) wafer of SiC. These wafers will feed into SSPL/GAETEC fab.

2. Raw materials: Raw material sourcing is domestic. This is what this latest announcement is about. Silicon carbide is melted into liquid & then solidified into a single crystal solid ingot. This billet will be sliced to make wafers. Adani Solar recently unveiled their domestically made large sized (300 mm I think) monocrystalline Silicon ingot. To be used for making solar cells:
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The technology & raw materials are sourced from abroad. The ingot is also of a lower purity that what DRDO is producing. But still a good milestone.

3. Fab technology: This remains a critical sticking point for us. The fabs we have right now:

i. 180 nm CMOS at SCL, ISRO: Fully operational fab.
ii. 100 nm CMOs at SITAR, DRDO: Prototyping facility.
iii. 500 nm & 700 nm MESFET GaAs fab at SSPL, DRDO: This is where our current GaAs chips are built.
iv. 90 nm FinFET at GAETEC, DRDO: This is where DRDO's seeker, radar & radio chips are made. This facility built the 1GHz MigaCORE designed by ANURAG, DRDO. That chip is used on Tejas' fight computer.
v. 130 nm AlGaN/GaN HEMT at GAETEC, DRDO: For making GaN based transistors for radars, seekers etc.
vi. IIT-Mandi 20 nm FinFET: Tech demonstration. DRDO is funding the development of a sub-10 nm photoresists based on IIT-Mandi's research work.
vii. 14 nm ultra dense FinFET at IISc's CeNSE: Lab scale fab. Funded by SSPL. Still some years away from full scale adoption.

Hopefully SCL gets upgraded to <50 nm. That would solve a lot of our production bottlenecks.

So, Reliance has also managed to produce a 300mm x 2.85m mono-crystalline N-type Si ingot.
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First Indian company to potentially achieve domestically mfg solar-grade silicon wafers — BLR-based RSPL, Raana Semiconductors has raised $3M to support R&D for indigenously designed Czochralski (CZ) monocrystalline ingot pullers (10–12 inch) solar-grade silicon ingots. Key upstream gap that currently drives +$500M/year in wafer imports from China.

RSPL targets commercial rollout within ~18 months, aiming to support ~5 GW capacity over 5 years, with plans to expand into semicon-grade wafers. Effort builds on their proven crystal-growth expertise, including Nd:YAG defence projects under MoD’s iDEX.

Without scaling domestic ingots/wafers/polysilicon, India’s solar import bill will hit $30 bn/year by 2030 as capacity additions outpace upstream localisation

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First Indian company to potentially achieve domestically mfg solar-grade silicon wafers — BLR-based RSPL, Raana Semiconductors has raised $3M to support R&D for indigenously designed Czochralski (CZ) monocrystalline ingot pullers (10–12 inch) solar-grade silicon ingots. Key upstream gap that currently drives +$500M/year in wafer imports from China.

RSPL targets commercial rollout within ~18 months, aiming to support ~5 GW capacity over 5 years, with plans to expand into semicon-grade wafers. Effort builds on their proven crystal-growth expertise, including Nd:YAG defence projects under MoD’s iDEX.

Without scaling domestic ingots/wafers/polysilicon, India’s solar import bill will hit $30 bn/year by 2030 as capacity additions outpace upstream localisation

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Apparently, this company received ToT from BARC:
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BARC developed this tech foe some radiation sensors:
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SSPL's 500nm Si based MEMS facility. This facility used 500 & 700nm node on MESFET technology:

Here an etched Si-wafer is being prepared for dicing:
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MEMS sensor chip in a packaging die:
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SSPL is funding the development of a 14 nm ultra-dense FinFET node at IISc's CeNSE. No updates on that for a few years.

 

Union Minister Ashwini Vaishnaw Visits ASML Headquarters in the Netherlands

Consistent Policies, Talent Base Drawing Global Equipment Makers to India​


Union Minister for Electronics and Information Technology, Ashwini Vaishnaw, visited the headquarters of ASML in Veldhoven, Netherlands, today.

Speaking during the visit, the Minister said that India has started a new semiconductor industry and that lithography, which involves printing the circuit on the wafer, is the most complex and precision-intensive process in the entire semiconductor manufacturing chain.

The Minister informed that ASML is the world’s leading provider of lithographic tools and added that ASML enables practically every chip manufactured in the world. “Our fab in Dholera will be using ASML equipment. So I have come here to visit and understand their technology,” Shri Vaishnaw said.

The Minister emphasised that ASML coming to India would be a significant development, noting that several equipment manufacturers from across the world are now looking to establish a base in India due to the country’s design capabilities, large talent pool, and the consistent policies of Prime Minister Narendra Modi.
 
“Duties on imported machinery, such as lithography equipment, wafer cutting tools, and automatic test equipment are expected to drop from previous highs of 40-44% down to zero,” said Ashok Chandak, President IESA. This will be a major boost for the semiconductor fab and OSAT sectors as India imports all of these machines from other countries.

 
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So the actual launch of the phase 2 will be next year.